Busses like PCI have developed extensions to increase capacity, but often adversely impact cost and complexity.
The data path between clients and storage arrays is a journey across diverse networking devices and I/O busses. The weakest link in this network is typically an I/O bottleneck or a source of non-recoverable errors.
Data Path: Figure 1 shows a network connecting clients to a storage array, as well as the locations of PCI busses and where PCI Express migrations are likely to occur.
However, the server uses faster speed PCI-X busses to interface its Ethernet controller to the LAN.
Undesired analog effects associated with parallel data busses such as crosstalk, ground bounce, ringing, and clock skew have become major design constraints for the Ultra ATA interface, which is forced to maintain compatibility with legacy parallel technology.
Thus it is most apparent in parallel busses where multiple adjacent lines may be switching in the same direction at the same time and inject a noise voltage onto a victim signal.
* Ground bounce is most problematic when several signals switch at the same time or when using high-speed drivers, both common with parallel data busses. The instantaneous power draw is such that the decoupling capacitors for the device cannot supply the necessary current and the supply voltage sags.