XOR gate


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  • noun

Synonyms for XOR gate

gate for exclusive OR

References in periodicals archive ?
This causes the XOR gate to invert the AND gate's attempt to set BUS-SEL low.
f] is the average value of the filtered output of the XOR gate.
Length of p- test is equal to 4N where N is the size of memory array and for its implementation is needed an up-down counter two flip-flops and a XOR gate.
In this section, we propose our new high speed and single layer two-input XOR gate using the X + YZ equation mentioned above.
Zhang, "Parameter design and performance analysis of an ultrafast all-optical XOR gate based on quantum-dot semiconductor optical amplifiers in nonlinear Mach-Zehnder interferometer," Opt.
Each clock cycle takes the delay of one 2-input AND gate, one 2-input XOR gate, and one 1-bit latch.
In term of power consumption, conventional full adder consumes high power due to use of high power consumption XOR gate.
The XOR gate is a CMOS basic gate that has the behaviour of sum of products xy + xy wherein x and y are the input signals.
out] is obtained with the help of AND and OR tracked by XOR gate.
Ye, "Simulation of an all-optical XOR gate with a semiconductor optical amplifier Mach-Zehnder interferometer sped up by a continuous-wave assistant light," Journal of Optical Networking, Vol.
This is the essence of Zeh's decoherence theory which does not violate Schrodinger equation and one ends up with states that are not true classical mixtures, but have the same mathematical description satisfying the XOR gate.
It should be made clear that ILS uses a MISR to compact output data where VirtualScan uses only XOR gate logic.
For multiplexers and AND gates using the TSMC library executions while for the XOR gate we have used the faster ten transistor implementation based on transmission gate XOR to tie the delay with AND gates.
The simplest half adder design incorporate an XOR gate for Sandman AND gate for Cas shown in Fig 1.
In this research it was found that the main reason for the high power consumption of the Sbox of composite field, is determined by the creation and dispersion of dynamic risks due to the use of complicated signal paths, and the dispersion of signal transitions related to the type of logic gate, particularly for the use of XOR gates.