reduced instruction set computing


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Related to reduced instruction set computing: complex instruction set computing, Instruction set architecture
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Synonyms for reduced instruction set computing

(computer science) a kind of computer architecture that has a relatively small set of computer instructions that it can perform

References in periodicals archive ?
PowerPC chips are based on a reduced instruction set computing (RISC) architecture, and incorporate leading-edge technologies and processes from both IBM and Motorola.
PowerPC chips, jointly designed by Apple (NASDAQ: AAPL), IBM, and Motorola, are based on a reduced instruction set computing (RISC) architecture, and incorporate leading-edge technologies and processes from both IBM and Motorola.
Kahle (Technology Group, Austin, Texas) has been a leader in defining, designing and delivering IBM's leading-edge, high-performance Reduced Instruction Set Computing (RISC) microprocessors.
The Vibratto architecture includes two advanced embedded processors; a 32-bit Reduced Instruction Set Computing (RISC) CPU for general system management and a 64-bit Digital Signal Processor (DSP) for audio/video and graphics acceleration.
In April 1991, ZDS joined 20 other firms as a founding member of ACE, which had as its goal the development of an independent standard for a reduced instruction set computing (RISC) platform.
The TC35274XB fits four megabits (Mb) of DRAM memory plus a 16-bit Reduced Instruction Set Computing (RISC) processor and dedicated hardware accelerators into a package only 11 millimeter (mm) (less than half an inch) on a side.
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